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Eliminate defects to enable fabrication of high performance III-V optoelectronic devices on silicon

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Photovoltaic cells exist today in a multitude of forms. The most efficient on the market are those composed of III-V semiconductor materials on Germanium (Ge). The excellent performance of these cells, with efficiencies above 40%, is due to their ability to independently convert different sections of the solar spectrum. Despite record yields, the cost of these cells is still too high to reach the mass market. Indeed, the price of the Ge substrate represents more than 50% of the cell while less than 1% of it constitutes the active area where the current is generated. Many semiconductor technologies, especially those of the III-V family, rely on the ability to synthesize thin films of high crystalline quality. In standard technologies, films are produced by epitaxy from a starting crystal called "substrate", whose crystalline structure is almost identical to that of the film to be synthesized.

Current epitaxy techniques do not allow Ge to be combined with Silicon (Si) due to a high lattice offset (4.2%). This constraint considerably limits the choice of films that can be produced for device fabrication. Materials with potentially extremely potent properties cannot be used for commercial devices due to the lack of a suitable substrate. Therefore, some technologies with excellent performance are confined to niche markets because the substrate needed to produce high quality films is too expensive.

The idea is therefore to integrate a thin layer of Ge on a less expensive support substrate. The Si seems to be an ideal platform due to its competitive price and its reduced number of dislocations which greatly increases its potential efficiency.


This invention represents various methods to be applied to a semiconductor structure composed of two different crystalline materials, the substrate and the "layer", to create a semiconductor region of high crystal quality, having a low density of crystal defects. These different methods consist in creating voids by using pores (or nano-cavities) in specific regions of the crystalline structure of the layer and the substrate. These cavities exert an attractive force and act as annihilation sites for the network of crystal defects. These defects, called "dislocations", are affected by the presence or formation of pores or cavities nearby. Upon thermal stimulation, the parallel arrays of dislocations and cavities mobilize and interact to achieve a configuration comprising a crystalline region with very few defects.

With the possibility of repairing the defects produced by the deposition of films on a substrate in crystalline shift, the invention opens the door to the fabrication of a multitude of devices from currently unavailable materials. The invention also makes it possible to manufacture devices currently confined to high value-added markets, given the high cost of the substrate, by replacing them with low-cost substrates (often Si). The wafer obtained has a very high quality Ge surface, containing 10X to 100X less dislocations, more easily able to receive the active layers which will form several types of devices.



  • Potential to significantly increase the efficiency of III-V multi-junction solar cells on Si. 

  • Not limited to Ge; can apply to various heteroepitaxial structures with high lattice offset.

  • Ability to create devices that are currently uncraftable, e.g. lasers on Si. 

  • Superior layer quality to any other technique currently available 

  • Fewer defects (10X to 100X)

  • Lower rejection rate and better yield of each wafer; more devices per wafer.

  • Larger inserts, reducing costs.


  • Low manufacturing cost and scalable process

  • Standard processes (electrochemical treatment and thermal annealing) compatible with existing manufacturing processes and infrastructures.

  • Reduced device fabrication costs - replacement of a bulk Ge substrate with a Ge/Si substrate possessing similar qualities to its bulk Ge counterpart.

  • Compatible with large size substrates - 4, 6 and 10 inches.


  • An ideal solution to improve the performance, and reduce the cost, of optoelectronic and microelectronic devices based on III-V-on-Si materials 

  • III-V-on-Si materials and Ge-on-Si based devices, such as: 

  • Multi-junction solar cells on Si, photodetectors, microprocessors, Ge-on-Si modulators, optical sensors, LEDs, quantum devices and others. 

  • Several industries - photovoltaics, photonics, electronics.



TRL 2-3 for device 

  • Current development activity: prototyping devices to achieve TRL 4. 

  • A promising core technology recognized by academia and industry enabling device growth on a high quality substrate: 

  • The proof of concept was demonstrated by the fabrication and characterization of Ge-on-Si substrates with nano-cavities having the following characteristics:

  • Dislocation density achieved: ~10e4 per square cm (a reduction of ~10e8 per square cm) - a 10,000 fold reduction in defects.

  • Detailed in the following Nature Communications article: "Uprooting defects to enable high-performance III-V optoelectronic devices on silicon": -136bad5cf58d_


  • International patent application filed.


Development/collaboration partners. Commercial Partners. Grant of licenses.

Project Director: François Nadeau

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